Field
This disclosure relates to the field of data processing systems. More particularly, this disclosure relates to mechanisms for managing the receipt of interrupt signals from a plurality of different sources and arbitrating the priority levels associated with those different interrupt sources.
Description
It is known to provide interrupt controllers which arbitrate between priority levels associated with different interrupt signals which may be concurrently pending. In a real time processing system, a large number of potential interrupt sources may serve to trigger different processing responses. Some of these interrupt sources will have a higher level of priority associated with them compared with other of the interrupt sources. Accordingly, the interrupts are each associated with a priority level and when multiple interrupts are concurrently asserted, these priority levels are compared to determine the interrupt with the highest priority level such that the highest pending priority interrupt (HPPI) may be identified. The HPPI will be selected for processing before other of the pending interrupts.